Functional safety is a major challenge for field programmable gate arrays (FPGAs) and other semiconductor designs. Safety requirements go beyond traditional verification, which focuses on design bugs.
This is the second part of a two-part discussion (Part 1 appeared in August) in which the author considers fault-coverage analysis and simulation for full-scan testing of ASIC designs. These elements ...
The complexity of automotive ICs continues to grow exponentially, challenging even the most veteran teams to deliver innovative products to market while simultaneously ensuring safety through the ...
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