EDN

Reshaping the SoC power design flow

Power integrity has become one the most critical issues as chip designs have transitioned to 130nm and 90nm processing technologies. Decreasing supply voltages, increasing device density and leakage ...
EDN

ESL-based flow eases complex SoC design

Deep-submicron technologies have clearly had a big impact on capacity and what can be designed on a single system-on-chip (SoC). With increased functionality, however, comes increased complexity for ...
Design-Reuse

The SoC Leopard Pro Core Compiler from Socle Improves SoC Design Flow Efficiency

Taipei -- Jan. 18, 2006 – Socle, the leading service provider of SoC design platform, enhanced its own design flow technology overall and implemented own developed SoC Leopard Pro Core Compiler ...
Nasdaq

Synopsys Launches the Era of Smarter SoC Design with ML-Driven Big Data Analytics Technology

Synopsys DesignDash Autonomously Uncovers Untapped, Actionable Design Insights to Accelerate the IC Design Process The digital design flow holds a wealth of information from myriad sources that, ...
Semiconductor Engineering

Earlier SoC Design Exploration And Verification Gets Better Designs To Tapeout Faster

Between the complexity of advanced node design verification and the competition to be first to the market, system-on-chip (SoC) designers no longer have the luxury of waiting until each sub-block of a ...
SDxCentral

Synopsys 5G SoC enhances 5G development with new RF design flow for TSMC N6RF process

RFICs (Radio Frequency Integrated Circuits) for wireless data transmission systems, such as transceivers and RF front-end components, are becoming more complex based on the demands of our connected ...
KTLA

Baum’s Power Analysis Suite is Adopted for ASICLAND SoC Design Flow

PowerBaum is now offered through ASICLAND's solution SoC model, in which ASICLAND is involved in customers' product development process early on. Power analysis from the early design stage is very ...