Abstract: Combinational equivalence checking (CEC) is a fundamental task in the realization of digital designs which is unlikely to have universally efficient algorithms due to its co-NP-completeness.
Add a description, image, and links to the circuits-as-code topic page so that developers can more easily learn about it.
Abstract: This paper presents an efficient algorithm for post-synthesis logic simulation of digital circuits with oscillatory combinational loops. Oscillatory combinational loops can significantly ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results
Feedback